Typically, each of a rail to rail comparator and a rail to rail includes three stages: an input stage, an intermediate stage, and an output stage. The input and intermediate stages provide sufficient gain to each input signal, to enable final processing in the output stage.
Examples of conventional rail to rail operational amplifier input stages are disclosed in U.S. Pat. No. 5,414,388, issued May 9, 1995, and U.S. Pat. No. 5,455,535, issued Oct. 3, 1995, both assigned to the assignee of the present invention. U.S. Pat. No. 5,455,535 also discloses several embodiments of a conventional intermediate stage for a rail to rail operational amplifier, for amplifying a differential output signal from the input stage disclosed therein.
Conventional input stage circuitry (and combined input and intermediate stage circuitry) for use in an operational amplifier is typically designed to have high gain and good stability, and as a result is too slow (in the sense that its slew rate is too low) for use as the input stage (or combined input and intermediate stage) of many desired implementations of rail to rail comparators (in which high slew rate is critical, and less gain and stability can be tolerated).
Further, typical conventional input stage (and combined input and intermediate stage) circuitry for rail to rail comparators cannot be implemented with components of minimum geometry, and thus the comparators cannot be implemented in integrated circuits having sufficiently small physical size for many desired applications.